Home > Portland jobs > Portland miscellaneous jobs

Posted: Wednesday, November 8, 2017 12:36 AM

If you are passionate about seeing your ideas go from white board to billions of pieces of silicon, join the ground floor of Intel's next generation core design team in Hillsboro, Oregon. Our goal: to build a revolutionary microprocessor core to power the next decade of computing and create experiences we have yet to dream up.

In this position, as a member of the CPU pre-silicon verification team, you will be responsible for applying formal verification techniques to find bugs in architecture specs and RTL implementation of the next generation core micro-architecture.

Your responsibilities may include, but are not limited to, the following:

  • Technical ownership of formal verification of one or more microarchitecture blocks through tapein and post-si debug
  • Understand and contribute to micro-architecture specification and define verification strategy for a significant portion of the design
  • Document formal verification plans and drive technical reviews of plans and proofs with design and architecture teams
  • Identify and create automated formal verification flows for efficient and timely execution
  • Investigate and deploy new formal verification techniques and define standard methodologies for use across the team
  • Lead ROI analysis and recommend appropriate use of formal verification vs dynamic validation techniques for relevant parts of the CPU Influence and contribute to post-silicon validation focus and sighting resolution


Minimum Requirements:

PhD in Computer Science or Computer Engineering or Electrical Engineering OR M.S. in Computer Science or Computer Engineering or Electrical Engineering plus 3 years of relevant work experience OR B.S. in Computer Science or Computer Engineering or Electrical Engineering plus 4 years of relevant work experience in the following areas:

  • Hands on experience with industry standard formal tools such as JasperGold, IFV, Questa Formal, VC Formal
  • Deep understanding of abstraction techniques and formal verification technologies
  • Experience in formal verification of complex IPs like CPUs, GPUs etc.
  • Experience with HDLs such as Verilog/VHDL/SystemVerilog and assertion specifications using SVAs
  • Proficiency in programming/scripting languages like Perl, Python, C/C++, Ocaml, Haskell
  • Advanced knowledge of computer architecture and digital logic design
  • Excellent problem solving and debugging skills
  • Ability to lead technical activities with aggressive timelines
  • Strong communication and collaboration skills
  • Ability to tolerate ambiguity and influence decision making in a highly complex environment

Preferred Requirements:

  • Knowledge of dynamic validation techniques and ability to switch between formal and dynamic methods as needed
  • Industry experience in pre-silicon verification of CPU cores or other similar scope IPs
  • Familiarity with test environment languages like Specman/E, System Verilog UVM/OVM and simulation failure debug experience
  • Research publications, patent filings, or other evidence of personal technical innovation in formal verification or/and validation methodology advancement

Inside this Business Group

The Platform Engineering Group (PEG) is responsible for the design, development, and production of system-on-a-chip (SoC) products that go into Intel’s next generation client and mobile platforms. PEG strives to lead the industry moving forward through product innovation and world class engineering.

Posting Statement. Intel prohibits discrimination based on race, color, religion, gender, national origin, age, disability, veteran status, marital status, pregnancy, gender expression or identity, sexual orientation or any other legally protected status.

Click here for more info:

• Location: Portland

• Post ID: 24277917 portland is an interactive computer service that enables access by multiple users and should not be treated as the publisher or speaker of any information provided by another information content provider. © 2017